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975ce33610
Adds latest 6.6 patches from the Raspberry Pi repository. These patches were generated from: https://github.com/raspberrypi/linux/commits/rpi-6.6.y/ Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
56 lines
2.1 KiB
Diff
56 lines
2.1 KiB
Diff
From 96ebf0a9fc30646420af7ef5c273b81d35a78a75 Mon Sep 17 00:00:00 2001
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From: Phil Elwell <phil@raspberrypi.com>
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Date: Wed, 1 Nov 2023 10:13:29 +0000
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Subject: [PATCH 0695/1085] PCI: brcmstb: Change RCB_{MPS,64B}_MODE bits
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Upstream commit [1] unconditionally sets the RCB_MPS and RCB_64B bits
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that govern where packets are split. We think this is potentially
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harmful, particularly on CM4 and Pi 5 where potentially any PCIe devices
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could be attached.
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Make RCB_MPS conditional on a DT property and never set RCB_64B.
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[1] commit 602fb860945f ("PCI: brcmstb: Set RCB_{MPS,64B}_MODE bits")
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Signed-off-by: Phil Elwell <phil@raspberrypi.com>
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---
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drivers/pci/controller/pcie-brcmstb.c | 8 +++++---
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1 file changed, 5 insertions(+), 3 deletions(-)
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--- a/drivers/pci/controller/pcie-brcmstb.c
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+++ b/drivers/pci/controller/pcie-brcmstb.c
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@@ -336,6 +336,7 @@ struct brcm_pcie {
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struct device_node *np;
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bool ssc;
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bool l1ss;
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+ bool rcb_mps_mode;
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int gen;
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u64 msi_target_addr;
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struct brcm_msi *msi;
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@@ -1196,14 +1197,14 @@ static int brcm_pcie_setup(struct brcm_p
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/*
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* Set SCB_MAX_BURST_SIZE, CFG_READ_UR_MODE, SCB_ACCESS_EN,
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- * RCB_MPS_MODE, RCB_64B_MODE
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+ * RCB_MPS_MODE
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*/
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tmp = readl(base + PCIE_MISC_MISC_CTRL);
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u32p_replace_bits(&tmp, 1, PCIE_MISC_MISC_CTRL_SCB_ACCESS_EN_MASK);
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u32p_replace_bits(&tmp, 1, PCIE_MISC_MISC_CTRL_CFG_READ_UR_MODE_MASK);
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u32p_replace_bits(&tmp, burst, PCIE_MISC_MISC_CTRL_MAX_BURST_SIZE_MASK);
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- u32p_replace_bits(&tmp, 1, PCIE_MISC_MISC_CTRL_PCIE_RCB_MPS_MODE_MASK);
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- u32p_replace_bits(&tmp, 1, PCIE_MISC_MISC_CTRL_PCIE_RCB_64B_MODE_MASK);
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+ if (pcie->rcb_mps_mode)
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+ u32p_replace_bits(&tmp, 1, PCIE_MISC_MISC_CTRL_PCIE_RCB_MPS_MODE_MASK);
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writel(tmp, base + PCIE_MISC_MISC_CTRL);
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brcm_pcie_set_tc_qos(pcie);
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@@ -1918,6 +1919,7 @@ static int brcm_pcie_probe(struct platfo
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pcie->ssc = of_property_read_bool(np, "brcm,enable-ssc");
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pcie->l1ss = of_property_read_bool(np, "brcm,enable-l1ss");
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+ pcie->rcb_mps_mode = of_property_read_bool(np, "brcm,enable-mps-rcb");
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ret = clk_prepare_enable(pcie->clk);
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if (ret) {
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